1. Field of the Invention
The present invention relates to a method for manufacturing a silicon semiconductor device, and more particularly to a method for manufacturing devices with a high contamination sensitivity to heavy metals, such as Si-CCD solid state image sensors.
2. Description of the Prior Art
In the manufacture of Si semiconductor devices, impurity contamination of Si wafers by heavy metals and the like is an important factor to degrade the characteristics and the reliability of devices produced.
In particular, solid state image sensors of charge coupled devices (CCDs) handling micro-signal charges are devices easily contaminated by heavy metals.
Such a contamination by heavy metals is also handled as an important problem in memory devices with a highly dense integration degree.
For improving the cleanliness in installations for manufacturing Si semiconductor devices and chemical materials, various ultra clean techniques have been proposed. One is disclosed in Ultra LSI Ultra Clean Technology Workshop No. 7 Announcement, Japanese Semiconductor Basic Technology Research Committee: May, 1990.
However, a more economical countermeasure is required, because an introduction of the above new techniques results in a great increase in installation cost.
On the premise that some degree of the contamination by heavy metal is inevitable, a method for gettering the contamination in a subsequent process has played an important part in solving the contamination problem.
Conventionally, various gettering methods have been used in the measurement of semiconductor devices with a high contamination sensitivity to heavy metals, such as Si-CCD solid state image sensors. The known gettering methods will now be exemplified.
The first conventional method is illustrated in FIG. 3, wherein a layer 29 of bulk-micro-defects is formed in a silicon substrate 30, to be used as a gettering sink.
The second method is illustrated in FIGS. 4a and 4b. In accordance with this method, a silicon substrate 18 is subjected at its back surface to an exposure process, prior to a process for diffusing phosphorous ions in a polysilicon layer 20 covering the silicon substrate 18, as shown in FIG. 4a. Then, a high concentration phosphorous-diffused layer 23 is formed on the back surface of substrate 18, as shown in FIG. 4b.
FIG. 5 illustrates the third method wherein a polysilicon layer 19 is formed on a back surface of a silicon substrate 18.
The fourth method is illustrated in FIG. 6, wherein a silicon substrate 18 is subjected at its back surface to an ion implantation or a sand blast treatment, to form a damage layer 29.
These methods provide an effect of improving a gettering capability of silicon substrates. However, it has been known that heavy metals once gettered become discharged in a heating process carried out at a relatively low temperature. It is also difficult to obtain a sufficient gettering effect by use of the process for diffusing phosphorous ions in the back surface of substrate, because the diffusion process is carried out at a low temperature and for a reduced time.
Furthermore, heavy metals may be liable to concentrate at a Si--SiO.sub.2 boundary region or stress generating portions formed due to the structure of a device produced. It is also difficult to reduce the surface contamination by heavy metals in the substrate or the gettering site of the back surface of substrate.
Presently, a front-side gettering is under investigation, wherein a defect layer is formed as a gettering site is formed in a region disposed beneath an element region, by implanting ions of high energy, so that a sufficient gettering effect is obtained at a lower temperature and in a reduced treatment time (Japanese Applied Physics Institute, Spring Conference in 1991, 31a-X-8 to 11).
In particular, it has been discovered that in a case of an ion implantation with boron or carbon, a heavy metal gettering causing no re-discharge of heavy metal could be achieved.
However, this method requires a new installation for performing an ion implantation with high energy of above 1 MeV.
As ions of high energy are implanted in a substrate 18 formed with a MOS transistor, as shown in FIG. 7a, they pass through an element region, thereby causing a gettering site region 28 to be formed beneath the element region, as shown in FIG. 7b. As a result, measuring of damage caused by the high energy ions and curing of the damage are required to be evaluated for every device structure. Accordingly, the method can be hardly regraded as an economical method.
The present invention intends to solve the abovementioned problems. To this end, the present invention intends to provide a gettering method capable of efficiently reducing heavy metals accumulated in an element region on the surface of a silicon substrate, in particular, a Si--SiO.sub.2 boundary region on the silicon substrate surface, without using any specific installation and with low cost.
Now, a gettering phenomenon importantly related with the present invention will be described.
Although various silicon crystal defects serve to getter heavy metal, they are re-discharged even at a relatively low temperature of 700.degree. to 800.degree. C. (Japanese Applied Physics Institute, Autumn Conference in 1992, 18p-ZH-5 Announcement No. 1, pp314).
It has been known that the gettering method utilizing an ion implantation was effective as a gettering method capable of preventing the re-discharge of heavy metals.
For instance, a very strong gettering capability was exhibited just after the implantation of boron ions. By an annealing treatment carried out after the ion implantation, Fe became gettered as if it overlaps with a boron profile exhibited just after the ion implantation (Y. Niki, S. Nadahara and M. Watabave: Proc. Int. Conf. Science and Tech. of Defect Control in Semicond., Yokohama, 1989, vol. 1, pp329).
There have been also reported gettering phenomenons of various elements. However, the gettering capability disappeared after a treatment was carried out at a high temperature of about 900.degree. C.
This may be because atoms implanted are directly substituted for Si by the high temperature treatment, so that they intrude into crystal lattices.
It has been also known that in a case of implanting carbon ions, the gettering capability was kept in that carbon atoms could intrude hardly into crystal lattices, even after the high temperature treatment (Japanese Applied Physics Institute, Autumn Conference in 1992, 18p-ZH-11 Announcement No. 1, pp313).
In this case, the gettering site is a structure associated with a primary fault caused by an implantation of carbon ions or carbon atoms present between lattices. The gettering capacity is approximately proportional to the dose amount of carbon.
The primary fault which is a point fault serves to fix heavy metal. After the connection with the heavy metal, the primary fault is not grown as a larger fault structure. As a result, the primary fault is difficult to be grown as a dislocation or an oxidation induced stacking fault.
There has been also disclosed utilization of an element isolation region or the like, non-depleted n.sup.+ and p.sup.+ regions, or a region to be removed in a subsequent process, as a gettering site region formed by the carbon ion implantation.
This is based on the fact that the gettering site formed by the carbon ion implantation is the point fault which is not grown as a large fault causing a degradation in device characteristics, even when heavy metals are gettered without using a thermal diffusion.
It has been also confirmed that the gettering by the ion implantation occurs, irrespective of an accelerated voltage of ions.
Consequently, the ion implantation can be achieved only at a region near the substrate surface by use of conventional ion implanting devices. However, the undepleted region can be used as the gettering site.
When the region in which a gettering of heavy metals occurs is oxidized, the heavy metals are drawn into the oxide film produced, because the fixing of heavy metals is stably obtained.
Accordingly, it is possible to use the Si surface region drawn into the oxide film as the gettering site, in a subsequent process.
Of course, in this method, it is required to prevent the region predetermined as the gettering site from reaching a region adversely affecting the device characteristics.
Since semiconductor devices have various sensitivity to the fault, a proper margin of up to 3.sigma. or 4.sigma. for a projected range upon implanting ions should be selected for every device or depending the design thereof.
Of course, the dose amount of ions implanted should be considered. At a large dose amount of ions, the damage density at the ion-implanted region becomes higher correspondingly. The amount of fixed heavy metals becomes increased, thereby resulting in an increase in the possibility that the secondary fault is grown.
Accordingly, the dose amount of ions implanted has an upper limit.
Actually, it has been reported that a secondary fault occurred at the ion dose amount of about 10.sup.16 /cm.sup.2, thereby resulting in a degradation in gettering capability (Japanese Applied Physics Institute, Autumn Conference in 1992, 18p-ZH-10 Announcement No. 1, pp312).
It seems that the upper limit of the ion dose amount is considerably low when ions are implanted in a region near the element region. However, where ion implantations are carried out several times under a condition that the dose amount of ions is divided into sub-dose amounts and an annealing is carried out at every ion implantation, it is possible to use the total ion dose amount of 10.sup.14 /cm.sup.2.